xtest

Test If In Transaction

XTEST

Sets ZF if processor is in transactional region.

Pseudocode Operation

if (RTM_TransactionActive) {
  ZF ← 1;  // Inside transaction
} else {
  ZF ← 0;  // Outside transaction
}
// All other flags unchanged

Encoding

Binary Layout

0F

+0

01

+1

D6

+2

 

Format Legacy

Opcode NP 0F 01 D6

Extension TSX

Operands

Related

More in TSX

Reference

View in Intel® 64 and IA-32 Architectures SDM ↗ Intel® SDM

Instruction Forms

Opcode	Instruction	Op/En	64/32-bit Mode	CPUID	Description
NP 0F 01 D6	XTEST	ZO	V/V	RTM	HLE or Test if executing in a transactional region.

Description

The XTEST instruction queries the transactional execution status. If the instruction executes inside a transactionally executing RTM region or a transactionally executing HLE region, then the ZF flag is cleared, else it is set.

Operation

XTEST
IF (RTM_ACTIVE = 1 OR HLE_ACTIVE = 1)
THEN
ZF := 0
ELSE
ZF := 1
FI;

Intel C/C++ Compiler Intrinsic Equivalent

XTEST int _xtest( void );

Flags Affected

The ZF flag is cleared if the instruction is executed transactionally; otherwise it is set to 1. The CF, OF, SF, PF, and AF, flags are cleared.

Exceptions

SIMD Floating-Point Exceptions

None.

Other Exceptions

#UDCPUID.07H.00H:EBX.HLE[4] = 0 and CPUID.07H.00H:EBX.RTM[11] = 0. If LOCK prefix is used. XTEST-Test if in Transactional Execution Vol. 2D 6-72