vpsrlvd

Variable Bit Shift Right Logical Doubleword

VPSRLVD ymm1, ymm2, ymm3/m256

Shifts doublewords right logical by individual counts.

Details

The Variable Bit Shift Right Logical Doubleword instruction shifts doublewords right logical by individual counts.

Pseudocode Operation

// Shifts doublewords right logical by individual counts

Example

VPSRLVD ymm1, ymm2, ymm3/m256

Encoding

Binary Layout
VEX
+0
opcode
+3
ModRM
+4
 
Format AVX2
Opcode C4 ... 45
Extension AVX2

Operands

  • dest
    256-bit YMM AVX register
  • src1
    256-bit YMM AVX register
  • src2
    256-bit YMM AVX register or Memory operand