vsha512msg1

SHA512 Message Schedule 1

VSHA512MSG1 ymm1, xmm2

SHA512 intermediate calculation (AVX512).

Details

The SHA512 Message Schedule 1 instruction sHA512 intermediate calculation (AVX512).

Pseudocode Operation

// SHA512 intermediate calculation (AVX512)

Example

VSHA512MSG1 ymm1, xmm2

Encoding

Binary Layout
CC
+0
 
Format EVEX
Opcode CC
Extension SHA512

Operands

  • dest
    256-bit YMM AVX register
  • src
    128-bit XMM SIMD register