vpcomb

Vector Packed Compare Byte

VPCOMB xmm1, xmm2, xmm3/m128, imm8

Compares bytes using immediate condition.

Details

Compares 16 packed bytes in xmm2 and xmm3/m128 using the condition specified in imm8, storing comparison results (all-1s or all-0s per byte) in xmm1. Supports eight comparison predicates (EQ, LT, LE, etc.). No EFLAGS are modified; results are encoded as packed byte masks.

Pseudocode Operation

for i in 0 to 15:
  byte_a ← xmm2[i*8 : i*8+7]
  byte_b ← xmm3[i*8 : i*8+7]
  result ← evaluate_condition(byte_a, byte_b, imm8)
  xmm1[i*8 : i*8+7] ← result ? 0xFF : 0x00

Example

VPCOMB xmm1, xmm2, xmm3/m128, 3

Encoding

Binary Layout
08
+0
CC
+1
 
Format XOP
Opcode XOP.128.08.W0 CC /r ib
Extension XOP

Operands

  • dest
    128-bit XMM SIMD register
  • src1
    128-bit XMM SIMD register
  • src2
    128-bit XMM SIMD register or Memory operand
  • src3
    8-bit signed immediate

Reference (AMD APM)

Instruction Forms

Opcode Instruction Op/En 64/32-bit Mode CPUID Description
8F RXB.08 0.src1.0.00 CC /r ib VPCOMB xmm1, xmm2, xmm3/mem128, imm8

Description

Signed Bytes Compares corresponding packed signed bytes in the first and second sources and writes the result of each comparison in the corresponding byte of the destination. The result of each comparison is an 8bit value of all 1s (TRUE) or all 0s (FALSE). There are four operands: VPCOMB dest, src1, src2, imm8 The destination (dest) is an XMM registers specified by ModRM.reg. When the comparison results are written to the destination XMM register, bits [255:128] of the corresponding YMM register are cleared. The first source (src1) is an XMM register specified by the XOP.vvvv field and the second source (src2) is either an XMM register or a 128-bit memory location specified by the ModRM.r/m field. The comparison type is specified by bits [2:0] of the immediate-byte operand (imm8). Each type has an alias mnemonic to facilitate coding. imm8[2:0] Comparison Mnemonic 000 Less Than VPCOMLTB 001 Less Than or Equal VPCOMLEB 010 Greater Than VPCOMGTB 011 Greater Than or Equal VPCOMGEB 100 Equal VPCOMEQB 101 Not Equal VPCOMNEQB 110 False VPCOMFALSEB 111 True VPCOMTRUEB

Flags Affected

None 710 [AMDVPCOMBPublic Use] Instruction Reference None

Exceptions

Exceptions

Mode Exception Cause of Exception Real Virt Prot X Instruction not supported, as indicated by CPUID feature identifier. X X XOP instructions are only recognized in protected mode. X CR4.OSXSAVE = 0, indicated by CPUID Fn0000_0001_ECX[OSXSAVE]. Invalid opcode, #UD X XFEATURE_ENABLED_MASK[2:1] ! = 11b. X REX, F2, F3, or 66 prefix preceding XOP prefix. X Lock prefix (F0h) preceding opcode. Device not available, #NM X CR0.TS = 1. Stack, #SS X Memory address exceeding stack segment limit or non-canonical. X Memory address exceeding data segment limit or non-canonical. General protection, #GP X Null data segment used to reference memory. Page fault, #PF X Instruction execution caused a page fault. Alignment check, #AC X Memory operand not 16-byte aligned when alignment checking enabled. X — XOP exception