in

Input from Port (Variable)

IN AL/AX/EAX, DX

Reads data from I/O port specified in DX.

Details

Reads 8, 16, or 32 bits from an I/O port whose address is specified in the DX register and stores the result in the AL, AX, or EAX accumulator respectively. The port number in DX is zero-extended to a full I/O address; I/O addressing and privilege checks are performed according to the IOPL field and TSS I/O bitmap. This instruction does not modify any flag bits and may have side effects on the I/O device.

Pseudocode Operation

port_address ← DX
if operand_size = 8:
  AL ← I/O_Read(port_address, 1)
else if operand_size = 16:
  AX ← I/O_Read(port_address, 2)
else if operand_size = 32:
  EAX ← I/O_Read(port_address, 4)

Example

IN AL/AX/EAX, DX

Encoding

Binary Layout

Format Legacy

Opcode ED

Extension Base

Operands

dest
Implicit accumulator: AL, AX, or EAX (depends on operand size)
src
Implicit DX register (I/O port address)

Reference (Intel® SDM)

Instruction Forms

Opcode	Instruction	Op/En	64/32-bit Mode	CPUID	Description
E4 ib	IN AL, imm8	I	Valid Valid	AL.	Input byte from imm8 I/O port address into
E5 ib	IN AX, imm8	I	Valid Valid	AX.	Input word from imm8 I/O port address into
E5 ib	IN EAX, imm8	I	Valid Valid	EAX.	Input dword from imm8 I/O port address into
EC	IN AL,DX	ZO	Valid Valid		Input byte from I/O port in DX into AL.
ED	IN AX,DX	ZO	Valid Valid		Input word from I/O port in DX into AX.
ED	IN EAX,DX	ZO	Valid Valid	EAX.	Input doubleword from I/O port in DX into

Description

Copies the value from the I/O port specified with the second operand (source operand) to the destination operand (first operand). The source operand can be a byte-immediate or the DX register; the destination operand can be register AL, AX, or EAX, depending on the size of the port being accessed (8, 16, or 32 bits, respectively). Using the DX register as a source operand allows I/O port addresses from 0 to 65,535 to be accessed; using a byte immediate allows I/O port addresses 0 to 255 to be accessed. When accessing an 8-bit I/O port, the opcode determines the port size; when accessing a 16- and 32-bit I/O port, the operand-size attribute determines the port size. At the machine code level, I/O instructions are shorter when accessing 8-bit I/O ports. Here, the upper eight bits of the port address will be 0. This instruction is only useful for accessing I/O ports located in the processor’s I/O address space. See Chapter 20, “Input/Output,” in the Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 1, for more information on accessing I/O ports in the I/O address space. This instruction’s operation is the same in non-64-bit modes and 64-bit mode.

Operation

IF ((PE = 1) and ((CPL > IOPL) or (VM = 1)))
THEN (* Protected mode with CPL > IOPL or virtual-8086 mode *)
IF (Any I/O Permission Bit for I/O port being accessed = 1)
THEN (* I/O operation is not allowed *)
#GP(0);
ELSE ( * I/O operation is allowed *)
DEST := SRC; (* Read from selected I/O port *)
FI;
ELSE (Real Mode or Protected Mode with CPL ≤ IOPL *)
DEST := SRC; (* Read from selected I/O port *)
FI;

Flags Affected

None. IN—Input From Port Vol. 2A 3-455

Exceptions

Protected Mode Exceptions

#GP(0) If the CPL is greater than (has less privilege) the I/O privilege level (IOPL) and any of the corresponding I/O permission bits in TSS for the I/O port being accessed is 1. #PF(fault-code) If a page fault occurs. #UD If the LOCK prefix is used.

Real-Address Mode Exceptions

#UD If the LOCK prefix is used.

Virtual-8086 Mode Exceptions

#GP(0) If any of the I/O permission bits in the TSS for the I/O port being accessed is 1. #PF(fault-code) If a page fault occurs. #UD If the LOCK prefix is used.

Compatibility Mode Exceptions

Same exceptions as in protected mode.

in