vsm4rnds4

SM4 Encrypt

VSM4E xmm1, xmm2

SM4 crypto encryption round.

Details

Performs one round of SM4 block cipher encryption on 128-bit data, applying the SM4 S-box substitution and linear transformation using round key material from the source XMM register. This instruction is used iteratively to encrypt 32 rounds of the SM4 algorithm and does not modify EFLAGS.

Pseudocode Operation

plaintext ← xmm1[32*i..32*i+31] for i in 0 to 3
RK ← xmm2[32*i..32*i+31] for i in 0 to 3
for i in 0 to 3:
  X ← plaintext[0..3]
  X ← SM4_F(X, RK[i])
  plaintext ← rotate_left(X, 1)
xmm1[128 bits] ← plaintext

Example

VSM4E xmm1, xmm2

Encoding

Binary Layout
DA
+0
 
Format VEX
Opcode VEX.128.F2.0F38.W0 DA /r
Extension SM4

Operands

  • dest
    128-bit XMM SIMD register
  • src
    128-bit XMM SIMD register

Reference (Intel® SDM)

Instruction Forms

Opcode Instruction Op/En 64/32-bit Mode CPUID Description
VEX.128.F2.0F38.W0 DA /r VSM4RNDS4 xmm1, xmm2, xmm3/m128 A V/V AVX SM4 Performs four rounds of SM4 encryption.
VEX.256.F2.0F38.W0 DA /r VSM4RNDS4 ymm1, ymm2, ymm3/m256 A V/V AVX SM4 Performs four rounds of SM4 encryption.

Instruction Operand Encoding

Op/En Tuple Type Operand 1 Operand 2 Operand 3 Operand 4
A N/A ModRM:reg (w) VEX.vvvv (r) ModRM:r/m (r) N/A

Description

The SM4RNDS4 instruction performs four rounds of SM4 encryption. The instruction operates on independent 128bit lanes. Additional details can be found at: https://tools.ietf.org/html/draft-ribose-cfrg-sm4-10. See “VSM4KEY4—Perform Four Rounds of SM4 Key Expansion” for the sbox table.

Operation

// see the VSM4KEY4 instruction for the definition of ROL32, lower_t

define L_RND(dword):
tmp := dword
tmp := tmp ^ ROL32(dword, 2)
tmp := tmp ^ ROL32(dword, 10)
tmp := tmp ^ ROL32(dword, 18)
tmp := tmp ^ ROL32(dword, 24)
return tmp

define T_RND(dword):
return L_RND(lower_t(dword))

define F_RND(X0, X1, X2, X3, round_key):
return X0 ^ T_RND(X1 ^ X2 ^ X3 ^ round_key)





VSM4RNDS4—Performs Four Rounds of SM4 Encryption                                                                                        Vol. 2C 5-763
VSM4RNDS4 DEST, SRC1, SRC2
VL = (128, 256) // VEX versions
KL := VL/128

for i in 0..KL-1:
P[0] := SRC1.xmm[i].dword[0]
P[1] := SRC1.xmm[i].dword[1]
P[2] := SRC1.xmm[i].dword[2]
P[3] := SRC1.xmm[i].dword[3]

C[0] := F_RND(P[0], P[1], P[2], P[3], SRC2.xmm[i].dword[0])
C[1] := F_RND(P[1], P[2], P[3], C[0], SRC2.xmm[i].dword[1])
C[2] := F_RND(P[2], P[3], C[0], C[1], SRC2.xmm[i].dword[2])
C[3] := F_RND(P[3], C[0], C[1], C[2], SRC2.xmm[i].dword[3])

DEST.xmm[i].dword[0] := C[0]
DEST.xmm[i].dword[1] := C[1]
DEST.xmm[i].dword[2] := C[2]
DEST.xmm[i].dword[3] := C[3]

DEST[MAXVL-1:VL] := 0

Intel C/C++ Compiler Intrinsic Equivalent

VSM4RNDS4 __m128i _mm_sm4rnds4_epi32 (__m128i __A, __m128i __B);
VSM4RNDS4 __m256i _mm256_sm4rnds4_epi32 (__m256i __A, __m256i __B);

Flags Affected

None.

Exceptions

SIMD Floating-Point Exceptions

None.

Other Exceptions

See Table 2-23, “Type 6 Class Exception Conditions.” VSM4RNDS4—Performs Four Rounds of SM4 Encryption Vol. 2C 5-764