pfrsqrt

Packed Floating-Point Reciprocal Square Root

PFRSQRT mm, mm/m64

Approximates reciprocal sqrt (3DNow!).

Details

Computes a fast approximation of the reciprocal square root (1/√x) for two packed single-precision floating-point values in parallel. This is a 3DNow! extension instruction that performs low-precision approximation suitable for iterative refinement; the approximation has limited accuracy (typically ~11-12 bits). No EFLAGS are modified.

Pseudocode Operation

dest[0:31] ← approx_rsqrt(src[0:31]);
dest[32:63] ← approx_rsqrt(src[32:63]);

Example

PFRSQRT mm, mm/m64

Encoding

Binary Layout
0F
+0
0F
+1
ModRM
+2
97
+3
 
Format 3DNow!
Opcode 0F 0F /r 97
Extension 3DNow!

Operands

  • dest
    64-bit MMX register
  • src
    64-bit MMX register or Memory operand

Reference (AMD APM)

Instruction Forms

Opcode Instruction Op/En 64/32-bit Mode CPUID Description
0F 0F /r 97 PFRSQRT mmx1, mmx2/mem64

Description

Approximation Computes the approximate reciprocal square root of the single-precision floating-point value in the low-order 32 bits of an MMX register or 64-bit memory location and writes the result in each doubleword of another MMX register. The source operand is single-precision with a 24-bit significand, and the result is accurate to 15 bits. Negative operands are treated as positive operands for purposes of reciprocal square-root computation, with the sign of the result the same as the sign of the source operand. This instruction can be used together with the PFRSQIT1 and PFRCPIT2 instructions to increase accuracy. The first stage of this refinement in accuracy (PFRSQIT1) requires that the input and output of the previously executed PFRSQRT instruction be used as input to the PFRSQIT1 instruction. The estimate contains the correct round-to-nearest value for approximately 99% of all arguments. The remaining arguments differ from the correct round-to-nearest value for the reciprocal by 1 unit-in-thelast-place (ulp). For details, see the data sheet or other software-optimization documentation relating to particular hardware implementations. The PFRSQRT instruction is an AMD 3DNow!™ instruction. The presence of this instruction set is indicated by CPUID feature bits. See “CPUID” in Volume 3 for more information about the CPUID instruction. The numeric range for operands is shown in Table 1-16 on page 128. AMD no longer recommends the use of 3DNow! instructions, which have been superceded by their more efficient 128-bit media counterparts. For a complete list of recommended instruction substitutions, see Appendix A, “Recommended Substitutions for 3DNow!™ Instructions” on page 333. Recommended Instruction Substitution RSQRTSS

Flags Affected

None 128 [AMDPFRSQRTPublic Use] Instruction64-BitReferenceMedia