pcmpestri

Packed Compare Explicit Length Strings, Return Index

PCMPESTRI xmm1, xmm2/m128, imm8

Complex string search/compare; returns index in ECX.

Pseudocode Operation

pcmp_control ← imm8[2:0]
string_type ← imm8[5:4]
polarity ← imm8[7:6]
len1 ← EAX & 0xFFFF
len2 ← EDX & 0xFFFF
intres ← perform_string_compare(dest, src, string_type, pcmp_control, len1, len2)
ECX ← intres
CF ← (intres < string_length)
ZF ← (intres == string_length)
SF ← OF ← undefined

Example

PCMPESTRI xmm1, xmm2/m128, 3

Encoding

Binary Layout
66
+0
0F
+1
3A
+2
61
+3
 
Format SSE4.2
Opcode 66 0F 3A 61
Extension SSE4.2

Operands

  • dest
    128-bit XMM SIMD register
  • src1
    128-bit XMM SIMD register or Memory operand
  • src2
    8-bit signed immediate

Related

More in SSE4.2

Instruction Forms

Opcode Instruction Op/En 64/32-bit Mode CPUID Description
VEX.128.66.0F3A 61 /r ib VPCMPESTRI xmm1, xmm2/m128, imm8 RMI V/V AVX Perform a packed comparison of string data with explicit lengths, generating an index, and storing the result in ECX.

Description

The instruction compares and processes data from two string fragments based on the encoded value in the imm8 control byte (see Section 4.1, “Imm8 Control Byte Operation for PCMPESTRI / PCMPESTRM / PCMPISTRI / PCMPISTRM”), and generates an index stored to the count register (ECX). Each string fragment is represented by two values. The first value is an xmm (or possibly m128 for the second operand) which contains the data elements of the string (byte or word data). The second value is stored in an input length register. The input length register is EAX/RAX (for xmm1) or EDX/RDX (for xmm2/m128). The length represents the number of bytes/words which are valid for the respective xmm/m128 data. The length of each input is interpreted as being the absolute-value of the value in the length register. The absolutevalue computation saturates to 16 (for bytes) and 8 (for words), based on the value of imm8[bit3] when the value in the length register is greater than 16 (8) or less than -16 (-8). The comparison and aggregation operations are performed according to the encoded value of imm8 bit fields (see Section 4.1). The index of the first (or last, according to imm8[6]) set bit of IntRes2 (see Section 4.1.4) is returned in ECX. If no bits are set in IntRes2, ECX is set to 16 (8). Note that the Arithmetic Flags are written in a non-standard manner in order to supply the most relevant information: CFlag - Reset if IntRes2 is equal to zero, set otherwise ZFlag - Set if absolute-value of EDX is < 16 (8), reset otherwise SFlag - Set if absolute-value of EAX is < 16 (8), reset otherwise OFlag - IntRes2[0] AFlag - Reset PFlag - Reset

Effective Operand Size

Operating mode/size        Operand 1         Operand 2         Length 1        Length 2            Result
16 bit                xmm            xmm/m128       EAX           EDX              ECX
32 bit                xmm            xmm/m128       EAX           EDX              ECX
64 bit                xmm            xmm/m128       EAX           EDX              ECX
64 bit + REX.W          xmm            xmm/m128       RAX          RDX              ECX

Intel C/C++ Compiler Intrinsic Equivalent For Returning Index int _mm_cmpestri (__m128i a, int la, __m128i b, int lb, const int mode);

Intel C/C++ Compiler Intrinsics For Reading EFlag Results int _mm_cmpestra (__m128i a, int la, __m128i b, int lb, const int mode); int _mm_cmpestrc (__m128i a, int la, __m128i b, int lb, const int mode); int _mm_cmpestro (__m128i a, int la, __m128i b, int lb, const int mode); int _mm_cmpestrs (__m128i a, int la, __m128i b, int lb, const int mode); int _mm_cmpestrz (__m128i a, int la, __m128i b, int lb, const int mode);

Exceptions

SIMD Floating-Point Exceptions

None.

Other Exceptions

See Table 2-21, “Type 4 Class Exception Conditions,” additionally, this instruction does not cause #GP if the memory operand is not aligned to 16 Byte boundary, and: #UD If VEX.L = 1. If VEX.vvvv ≠ 1111B. PCMPESTRI-Packed Compare Explicit Length Strings, Return Index Vol. 2B 4-255