phminposuw

Packed Horizontal Minimum

PHMINPOSUW xmm1, xmm2/m128

Finds minimum word and its index.

Pseudocode Operation

min_val ← src[15:0];
min_idx ← 0;
for i = 1 to 7:
  if (uint16_t)src[16*i+15:16*i] < min_val:
    min_val ← (uint16_t)src[16*i+15:16*i];
    min_idx ← i;
dest[15:0] ← min_val;
dest[18:16] ← min_idx;
dest[127:19] ← 0;

Encoding

Binary Layout

Format SSE4.1

Opcode 66 0F 38 41

Extension SSE4.1

Operands

dest
XMM
src
XMM/Mem

Reference

View in Intel® 64 and IA-32 Architectures SDM ↗ Intel® SDM

Instruction Forms

Opcode	Instruction	Op/En	64/32-bit Mode	CPUID	Description
66 0F 38 41 /r	PHMINPOSUW xmm1, xmm2/m128	RM	V/V	SSE4_1	Find the minimum unsigned word in xmm2/m128 and place its value in the low word of xmm1 and its index in the second-lowest word of xmm1.
VEX.128.66.0F38.WIG 41 /r	VPHMINPOSUW xmm1, xmm2/m128	RM	V/V	AVX	Find the minimum unsigned word in xmm2/m128 and place its value in the low word of xmm1 and its index in the second-lowest word of xmm1.

Description

Determine the minimum unsigned word value in the source operand (second operand) and place the unsigned word in the low word (bits 0-15) of the destination operand (first operand). The word index of the minimum value is stored in bits 16-18 of the destination operand. The remaining upper bits of the destination are set to zero. 128-bit Legacy SSE version: Bits (MAXVL-1:128) of the corresponding XMM destination register remain unchanged. VEX.128 encoded version: Bits (MAXVL-1:128) of the destination XMM register are zeroed. VEX.vvvv is reserved and must be 1111b, VEX.L must be 0, otherwise the instruction will #UD.

Operation

PHMINPOSUW (128-bit Legacy SSE Version)
INDEX := 0;
MIN := SRC[15:0]
IF (SRC[31:16] < MIN)
THEN INDEX := 1; MIN := SRC[31:16]; FI;
IF (SRC[47:32] < MIN)
THEN INDEX := 2; MIN := SRC[47:32]; FI;
* Repeat operation for words 3 through 6
IF (SRC[127:112] < MIN)
THEN INDEX := 7; MIN := SRC[127:112]; FI;
DEST[15:0] := MIN;
DEST[18:16] := INDEX;
DEST[127:19] := 0000000000000000000000000000H;

VPHMINPOSUW (VEX.128 Encoded Version)
INDEX := 0
MIN := SRC[15:0]
IF (SRC[31:16] < MIN) THEN INDEX := 1; MIN := SRC[31:16]
IF (SRC[47:32] < MIN) THEN INDEX := 2; MIN := SRC[47:32]
* Repeat operation for words 3 through 6
IF (SRC[127:112] < MIN) THEN INDEX := 7; MIN := SRC[127:112]
DEST[15:0] := MIN
DEST[18:16] := INDEX
DEST[127:19] := 0000000000000000000000000000H
DEST[MAXVL-1:128] := 0

Intel C/C++ Compiler Intrinsic Equivalent

PHMINPOSUW __m128i _mm_minpos_epu16( __m128i packed_words);

Flags Affected

None.

Exceptions

SIMD Floating-Point Exceptions