addss

Add Scalar Single-Precision

ADDSS xmm, xmm/m32

Adds the low 32-bit float.

Details

The Add Scalar Single-Precision instruction adds the low 32-bit float.

Pseudocode Operation

DEST <- DEST + SRC
// Flags affected: OF, SF, ZF, AF, CF, PF

Example

ADDSS xmm0, xmm1

Encoding

Binary Layout
F3
+0
0F
+1
58
+2
 
Format SSE
Opcode F3 0F 58
Extension SSE

Operands

  • dest
    128-bit SSE/AVX register (XMM)
  • src
    128-bit XMM register or 32-bit memory