vdivph

Divide Packed FP16 Values

VDIVPH zmm1 {k1}, zmm2, zmm3/m512

Divides half-precision floating-point values.

Details

The Divide Packed FP16 Values instruction divides half-precision floating-point values.

Pseudocode Operation

// Divides half-precision floating-point values

Example

VDIVPH zmm1, zmm2, zmm3/m512

Encoding

Binary Layout
EVEX
+0
5E
+4
 
Format EVEX
Opcode 5E
Extension AVX-512-FP16

Operands

  • dest
    512-bit ZMM AVX-512 register
  • src1
    512-bit ZMM AVX-512 register
  • src2
    512-bit ZMM AVX-512 register or Memory operand