fist

Store Integer

FIST m16int/m32int

Converts ST(0) to integer and stores in memory.

Pseudocode Operation

dest ← convert_to_integer(ST(0), rounding_mode);
update_x87_status_flags();

Encoding

Binary Layout

ModRM

Format Legacy

Opcode DF /2

Extension x87 FPU

Operands

dest
Integer Memory

Reference

View in Intel® 64 and IA-32 Architectures SDM ↗ Intel® SDM

Instruction Forms

Opcode	Instruction	64/32-bit Mode	Description
DF /2	FIST m16int	Valid Valid	Store ST(0) in m16int.
DB /2	FIST m32int	Valid Valid	Store ST(0) in m32int.
DF /3	FISTP m16int	Valid Valid	Store ST(0) in m16int and pop register stack.
DB /3	FISTP m32int	Valid Valid	Store ST(0) in m32int and pop register stack.
DF /7	FISTP m64int	Valid Valid	Store ST(0) in m64int and pop register stack.

Description

The FIST instruction converts the value in the ST(0) register to a signed integer and stores the result in the destination operand. Values can be stored in word or doubleword integer format. The destination operand specifies the address where the first byte of the destination value is to be stored. The FISTP instruction performs the same operation as the FIST instruction and then pops the register stack. To pop the register stack, the processor marks the ST(0) register as empty and increments the stack pointer (TOP) by 1. The FISTP instruction also stores values in quadword integer format. The following table shows the results obtained when storing various classes of numbers in integer format. Table 3-29. FIST/FISTP Results ST(0) DEST

- ∞ or Value Too Large for DEST Format                                                  *
F ≤ -1                                                - I
-1 < F < -0                                                                 **

- 0 0 + 0 0

+ 0 < F < + 1                                                                 **
F ≥ + 1                                                + I
+ ∞ or Value Too Large for DEST Format                                                  *

NaN *

Operation

DEST := Integer(ST(0));
IF Instruction = FISTP
THEN
PopRegisterStack;
FI;

Exceptions

Protected Mode Exceptions

#GP(0) If the destination is located in a non-writable segment. If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If the DS, ES, FS, or GS register is used to access memory and it contains a NULL segment selector. #SS(0) If a memory operand effective address is outside the SS segment limit. #NM CR0.EM[bit 2] or CR0.TS[bit 3] = 1. #PF(fault-code) If a page fault occurs. #AC(0) If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3. #UD If the LOCK prefix is used.

Real-Address Mode Exceptions

#GP If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. #SS If a memory operand effective address is outside the SS segment limit. #NM CR0.EM[bit 2] or CR0.TS[bit 3] = 1. #UD If the LOCK prefix is used.

Virtual-8086 Mode Exceptions

#GP(0) If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. #SS(0) If a memory operand effective address is outside the SS segment limit. #NM CR0.EM[bit 2] or CR0.TS[bit 3] = 1. #PF(fault-code) If a page fault occurs. #AC(0) If alignment checking is enabled and an unaligned memory reference is made. #UD If the LOCK prefix is used.

Compatibility Mode Exceptions

Same exceptions as in protected mode. FIST/FISTP-Store Integer Vol. 2A 3-348

64-Bit Mode Exceptions

#SS(0) If a memory address referencing the SS segment is in a non-canonical form. #GP(0) If the memory address is in a non-canonical form. #NM CR0.EM[bit 2] or CR0.TS[bit 3] = 1. #MF If there is a pending x87 FPU exception. #PF(fault-code) If a page fault occurs. #AC(0) If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3. #UD If the LOCK prefix is used. FIST/FISTP-Store Integer Vol. 2A 3-349