fxtract
Extract Exponent and Significand
FXTRACT
Separates exponent and significand of ST(0).
Details
Separates ST(0) into its exponent (as an integer) and significand (as a number in [1, 2) or [0, ∞) for special values). The exponent is pushed onto the stack, and ST(0) is replaced with the significand, so the original value can be recovered as significand × 2^exponent. This operation logically duplicates and replaces ST(0), increasing stack depth.
Pseudocode Operation
exponent ← extract_exponent(ST(0))
significand ← extract_significand(ST(0))
FPU_stack_push(exponent)
ST(0) ← significand
Example
FXTRACT
Encoding
Binary Layout
D9
+0
F4
+1
Operands
Reference (Intel® SDM)
Instruction Forms
| Opcode | Instruction | Op/En | 64/32-bit Mode | CPUID | Description |
|---|---|---|---|---|---|
| D9 F4 | FXTRACT | Valid Valid | Separate value in ST(0) into exponent and significand, store exponent in ST(0), and push the significand onto the register stack. |
Description
Separates the source value in the ST(0) register into its exponent and significand, stores the exponent in ST(0), and pushes the significand onto the register stack. Following this operation, the new top-of-stack register ST(0) contains the value of the original significand expressed as a floating-point value. The sign and significand of this value are the same as those found in the source operand, and the exponent is 3FFFH (biased value for a true exponent of zero). The ST(1) register contains the value of the original operand’s true (unbiased) exponent expressed as a floating-point value. (The operation performed by this instruction is a superset of the IEEE-recommended logb(x) function.)
This instruction and the F2XM1 instruction are useful for performing power and range scaling operations. The
FXTRACT instruction is also useful for converting numbers in double extended-precision floating-point format to decimal representations (e.g., for printing or displaying).
If the floating-point zero-divide exception (#Z) is masked and the source operand is zero, an exponent value of –
∞ is stored in register ST(1) and 0 with the sign of the source operand is stored in register ST(0).
This instruction’s operation is the same in non-64-bit modes and 64-bit mode.
Operation
TEMP := Significand(ST(0)); ST(0) := Exponent(ST(0)); TOP := TOP − 1; ST(0) := TEMP;
Exceptions
Protected Mode Exceptions
#NM CR0.EM[bit 2] or CR0.TS[bit 3] = 1.
#MF If there is a pending x87 FPU exception.
#UD If the LOCK prefix is used.
Real-Address Mode Exceptions
Same exceptions as in protected mode.
Virtual-8086 Mode Exceptions
Same exceptions as in protected mode.
FXTRACT—Extract Exponent and Significand Vol. 2A 3-420
Compatibility Mode Exceptions
Same exceptions as in protected mode.
64-Bit Mode Exceptions
Same exceptions as in protected mode.
FXTRACT—Extract Exponent and Significand Vol. 2A 3-421