vgetexpss

Get Exponent Scalar Single

VGETEXPSS xmm1 {k1}, xmm2, xmm3/m32

Extracts exponent from low float.

Details

Extracts the biased exponent from the low 32-bit single-precision floating-point element of xmm3/m32 and stores the result as a float in xmm1. The exponent is converted to a normalized floating-point representation. Supports EVEX masking and rounding modes; other three 32-bit elements in xmm1 are preserved from xmm2.

Pseudocode Operation

float32 src_val ← xmm3[0:31]
int32 exponent ← extract_biased_exponent(src_val)
xmm1[0:31] ← convert_exponent_to_float(exponent)
xmm1[32:127] ← xmm2[32:127]

Example

VGETEXPSS xmm1, xmm2, xmm3/m32

Encoding

Binary Layout

EVEX

Format EVEX

Opcode EVEX.LLIG.66.0F38.W0 43 /r

Extension AVX-512F

Operands

dest
128-bit XMM SIMD register
src1
128-bit XMM SIMD register
src2
128-bit XMM SIMD register or Memory operand

Reference (Intel® SDM)

Instruction Forms

Opcode	Instruction	Op/En	64/32-bit Mode	CPUID	Description
EVEX.LLIG.66.0F38.W0 43 /r	VGETEXPSS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}	A	V/V	AVX512F OR AVX10.1	Convert the biased exponent (bits 30:23) of the low single-precision floating-point value in xmm3/m32 to a single-precision floating-point value representing unbiased integer exponent. Stores the result to xmm1 under the writemask k1 and merge with the other elements of xmm2.

Instruction Operand Encoding

Op/En	Tuple Type	Operand 1	Operand 2	Operand 3	Operand 4
A	Tuple1 Scalar	ModRM:reg (w)	EVEX.vvvv (r)	ModRM:r/m (r)	N/A

Description

Extracts the biased exponent from the normalized single precision floating-point representation of the low doubleword data element of the source operand (the third operand) as unbiased signed integer value, or convert the denormal representation of input data to unbiased negative integer values. The integer value of the unbiased exponent is converted to single precision floating-point value and written to the destination operand (the first operand) as single precision floating-point numbers. Bits (127:32) of the XMM register destination are copied from corresponding bits in the first source operand. The destination must be a XMM register, the source operand can be a XMM register or a float32 memory location. If writemasking is used, the low doubleword element of the destination operand is conditionally updated depending on the value of writemask register k1. If writemasking is not used, the low doubleword element of the destination operand is unconditionally updated. Each GETEXP operation converts the exponent value into a floating-point number (permitting input value in denormal representation). Special cases of input values are listed in Table 5-15. The formula is: GETEXP(x) = floor(log2(|x|)) Notation floor(x) stands for maximal integer not exceeding real number x. Software usage of VGETEXPxx and VGETMANTxx instructions generally involve a combination of GETEXP operation and GETMANT operation (see VGETMANTPD). Thus VGETEXPxx instruction do not require software to handle SIMD floating-point exceptions.

Operation

// NormalizeExpTinySPFP(SRC[31:0]) is defined in the Operation section of VGETEXPPS
// ConvertExpSPFP(SRC[31:0]) is defined in the Operation section of VGETEXPPS





VGETEXPSS—Convert Exponents of Scalar Single Precision Floating-Point Value to Single Precision Floating-Point Value                   Vol. 2C 5-387
VGETEXPSS (EVEX encoded version)
IF k1[0] OR *no writemask*
THEN DEST[31:0] :=
ConvertExpDPFP(SRC2[31:0])
ELSE
IF *merging-masking*                                 ; merging-masking
THEN *DEST[31:0] remains unchanged*
ELSE                                                         ; zeroing-masking
DEST[31:0]:= 0
FI
FI;
ENDFOR
DEST[127:32] := SRC1[127:32]
DEST[MAXVL-1:128] := 0

Intel C/C++ Compiler Intrinsic Equivalent

VGETEXPSS __m128 _mm_getexp_ss( __m128 a, __m128 b);
VGETEXPSS __m128 _mm_mask_getexp_ss(__m128 s, __mmask8 k, __m128 a, __m128 b);
VGETEXPSS __m128 _mm_maskz_getexp_ss( __mmask8 k, __m128 a, __m128 b);
VGETEXPSS __m128 _mm_getexp_round_ss( __m128 a, __m128 b, int sae);
VGETEXPSS __m128 _mm_mask_getexp_round_ss(__m128 s, __mmask8 k, __m128 a, __m128 b, int sae);
VGETEXPSS __m128 _mm_maskz_getexp_round_ss( __mmask8 k, __m128 a, __m128 b, int sae);

Exceptions

SIMD Floating-Point Exceptions

Invalid, Denormal

Other Exceptions

See Table 2-49, “Type E3 Class Exception Conditions.” VGETEXPSS—Convert Exponents of Scalar Single Precision Floating-Point Value to Single Precision Floating-Point Value Vol. 2C 5-388