divpd

Divide Packed Double-Precision

DIVPD xmm, xmm/m128

Divides two 64-bit doubles.

Details

The Divide Packed Double-Precision instruction divides two 64-bit doubles.

Pseudocode Operation

// Divides two 64-bit doubles

Example

DIVPD xmm0, xmm1

Encoding

Binary Layout
66
+0
0F
+1
5E
+2
 
Format SSE2
Opcode 66 0F 5E
Extension SSE2

Operands

  • dest
    128-bit SSE/AVX register (XMM)
  • src
    128-bit XMM register or 128-bit memory