popcnt

Population Count

POPCNT r, r/m

Counts number of bits set to 1.

Details

Counts the number of set bits (1s) in the source operand and stores the result in the destination register. This instruction requires the SSE4.2 extension and is available in 16/32/64-bit variants. No flags are affected by this instruction, making it useful for bit-counting operations in high-performance code.

Pseudocode Operation

dest ← count_set_bits(src)

Example

POPCNT rax, rbx

Encoding

Binary Layout
F3
+0
0F
+1
B8
+2
 
Format VEX
Opcode F3 0F B8
Extension SSE4.2

Operands

  • dest
    General-purpose register
  • src
    Register or memory operand

Reference (Intel® SDM)

Instruction Forms

Opcode Instruction Op/En 64/32-bit Mode CPUID Description
F3 0F B8 /r POPCNT r16, r/m16 RM Valid Valid POPCNT on r/m16
F3 0F B8 /r POPCNT r32, r/m32 RM Valid Valid POPCNT on r/m32
F3 REX.W 0F B8 /r POPCNT r64, r/m64 RM Valid N.E. POPCNT on r/m64

Description

This instruction calculates the number of bits set to 1 in the second operand (source) and returns the count in the first operand (a destination register).

Operation

Count = 0;
For (i=0; i < OperandSize; i++)
{        IF (SRC[ i] = 1) // i’th bit
THEN Count++; FI;
}
DEST := Count;

Intel C/C++ Compiler Intrinsic Equivalent

POPCNT int _mm_popcnt_u32(unsigned int a);
POPCNT int64_t _mm_popcnt_u64(unsigned __int64 a);

Flags Affected

OF, SF, ZF, AF, CF, PF are all cleared. ZF is set if SRC = 0, otherwise ZF is cleared.

Exceptions

Protected Mode Exceptions

#GP(0) If a memory operand effective address is outside the CS, DS, ES, FS or GS segments. #SS(0) If a memory operand effective address is outside the SS segment limit. #PF (fault-code) For a page fault. #AC(0) If an unaligned memory reference is made while the current privilege level is 3 and alignment checking is enabled. #UD If CPUID.01H:ECX.POPCNT[23] = 0. If LOCK prefix is used.

Real-Address Mode Exceptions

#GP(0) If any part of the operand lies outside of the effective address space from 0 to 0FFFFH. #SS(0) If a memory operand effective address is outside the SS segment limit. #UD If CPUID.01H:ECX.POPCNT[23] = 0. If LOCK prefix is used. POPCNT—Return the Count of Number of Bits Set to 1 Vol. 2B 4-405 Virtual 8086 Mode Exceptions #GP(0) If any part of the operand lies outside of the effective address space from 0 to 0FFFFH. #SS(0) If a memory operand effective address is outside the SS segment limit. #PF (fault-code) For a page fault. #AC(0) If an unaligned memory reference is made while alignment checking is enabled. #UD If CPUID.01H:ECX.POPCNT[23] = 0. If LOCK prefix is used.

Compatibility Mode Exceptions

Same exceptions as in Protected Mode.

64-Bit Mode Exceptions

#GP(0) If the memory address is in a non-canonical form. #SS(0) If a memory address referencing the SS segment is in a non-canonical form. #PF (fault-code) For a page fault. #AC(0) If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3. #UD If CPUID.01H:ECX.POPCNT[23] = 0. If LOCK prefix is used. POPCNT—Return the Count of Number of Bits Set to 1 Vol. 2B 4-406