hreset
History Reset
Resets processor history (prediction) structures.
Pseudocode Operation
IF CPUID.HRESET = 0 THEN #UD FI;
select_bits ← imm8[7:0];
IF select_bits & 0x01 THEN RESET_BTB() FI;
IF select_bits & 0x02 THEN RESET_TLB() FI;
IF select_bits & 0x04 THEN RESET_RSB() FI;Example
Encoding
Operands
-
dest
8-bit signed immediate
Related
More in HRESET
Reference
Instruction Forms
| Opcode | Instruction | Op/En | 64/32-bit Mode | CPUID | Description |
|---|---|---|---|---|---|
| F3 0F 3A F0 C0 /ib | HRESET | A | V/V | Processor history reset request. Controlled by the HRESET imm8, <EAX> EAX implicit operand. |
Instruction Operand Encoding
| Op/En | Tuple Type | Operand 1 | Operand 2 | Operand 3 | Operand 4 |
|---|---|---|---|---|---|
| A | N/A | ModRM:r/m (r) | N/A | N/A | N/A |
Description
Requests the processor to selectively reset selected components of hardware history maintained by the current logical processor. HRESET operation is controlled by the implicit EAX operand. The value of the explicit imm8 operand is ignored. This instruction can only be executed at privilege level 0. The HRESET instruction can be used to request reset of multiple components of hardware history. Prior to the execution of HRESET, the system software must take the following steps: 1. Enumerate the HRESET capabilities via CPUID.20H.00H:EBX, which indicates what components of hardware history can be reset. 2. Only the bits enumerated by CPUID.20H.00H:EBX can be set in the IA32_HRESET_ENABLE MSR. HRESET causes a general-protection exception (#GP) if EAX sets any bits that are not set in the IA32_HRESET_ENABLE MSR. Any attempt to execute the HRESET instruction inside a transactional region will result in a transaction abort.
Operation
IF EAX = 0 THEN NOP ELSE FOREACH i such that EAX[i] = 1 Reset prediction history for feature i FI