blsic

Bit Line Set Isolated and Complement

BLSIC r32, r/m32

Isolates lowest set bit and complements (~x | (x-1)).

Pseudocode Operation

dest ← ~src | (src - 1)

Example

BLSIC eax, ebx

Encoding

Binary Layout

VEX

+0

opcode

+3

ModRM

+4

 

Format TBM

Opcode XOP.L0.09.W0 01 /6

Extension TBM

Operands

• dest
  32-bit general-purpose register (e.g. EAX)
• src
  32-bit register or memory

Related

More in TBM

Reference

View in Intel® 64 and IA-32 Architectures SDM ↗ AMD APM

Instruction Forms

Opcode	Instruction	Op/En	64/32-bit Mode	CPUID	Description
XOP.L0.09.W0 01 /6	BLSIC r32, r/m32				Sets all bits of the destination below and including the least-significant zero bit of the source to 1, clears all other bits, then complements the result.

Description

Finds the least significant zero bit in the source operand, sets it and all bits below it, clears the remaining bits, and complements the result into the destination (TBM).