knotq

Bitwise Logical NOT Masks Quadword

KNOTQ k1, k2

Bitwise NOT of 64-bit mask register.

Details

Performs a bitwise logical NOT operation on a 64-bit AVX-512 opmask register, inverting all bits. The instruction operates only on opmask registers (k0–k7) and does not affect general EFLAGS. This is an AVX-512BW extension instruction with no flag side effects.

Pseudocode Operation

dest ← ~src

Example

KNOTQ k1, k2

Encoding

Binary Layout
EVEX
+0
0F
+4
44
+5
 
Format EVEX
Opcode VEX.L0.0F.W1 44 /r
Extension AVX-512BW

Operands

  • dest
    AVX-512 opmask register (k0-k7)
  • src
    AVX-512 opmask register (k0-k7)

Reference (Intel® SDM)

Instruction Forms

Opcode Instruction Op/En 64/32-bit Mode CPUID Description
VEX.L0.0F.W0 44 /r KNOTW k1, k2 V/V RR AVX512F OR AVX10.1 Bitwise NOT of 16 bits mask k2.
VEX.L0.66.0F.W0 44 /r KNOTB k1, k2 V/V RR AVX512DQ OR AVX10.1 Bitwise NOT of 8 bits mask k2.
VEX.L0.0F.W1 44 /r KNOTQ k1, k2 V/V RR AVX512BW OR AVX10.1 Bitwise NOT of 64 bits mask k2.
VEX.L0.66.0F.W1 44 /r KNOTD k1, k2 V/V RR AVX512BW OR AVX10.1 Bitwise NOT of 32 bits mask k2.

Description

Performs a bitwise NOT of vector mask k2 and writes the result into vector mask k1.

Operation

KNOTW
DEST[15:0] := BITWISE NOT SRC[15:0]
DEST[MAX_KL-1:16] := 0

KNOTB
DEST[7:0] := BITWISE NOT SRC[7:0]
DEST[MAX_KL-1:8] := 0

KNOTQ
DEST[63:0] := BITWISE NOT SRC[63:0]
DEST[MAX_KL-1:64] := 0

KNOTD
DEST[31:0] := BITWISE NOT SRC[31:0]
DEST[MAX_KL-1:32] := 0

Intel C/C++ Compiler Intrinsic Equivalent

KNOTW __mmask16 _mm512_knot(__mmask16 a);

Flags Affected

None.

Exceptions

SIMD Floating-Point Exceptions

None.

Other Exceptions

See Table 2-65, “TYPE K20 Exception Definition (VEX-Encoded OpMask Instructions w/o Memory Arg).” KNOTW/KNOTB/KNOTQ/KNOTD—NOT Mask Register Vol. 2A 3-519