bswap
Byte Swap
Reverses the byte order of a 32/64-bit register.
Pseudocode Operation
if (operand_size == 32) {
dest ← {dest[7:0], dest[15:8], dest[23:16], dest[31:24]};
} else if (operand_size == 64) {
dest ← {dest[7:0], dest[15:8], dest[23:16], dest[31:24], dest[39:32], dest[47:40], dest[55:48], dest[63:56]};
}
Example
Encoding
Operands
-
dest
General-purpose register
Related
Other forms of bswap
- bswap Byte Swap, 0F C8+rd
Across architectures
Byte Swap (Endianness Reversal) : how x86, ARM, RISC-V, and PowerISA each do this.
More in Base
Reference
Instruction Forms
| Opcode | Instruction | Op/En | 64/32-bit Mode | CPUID | Description |
|---|---|---|---|---|---|
| 0F C8+rd | BSWAP r32 | O | Valid | Valid* Reverses the byte order of a 32-bit register. | |
| REX.W + 0F C8+rd | BSWAP r64 | O | Valid N.E. | Reverses the byte order of a 64-bit register. |
Description
Reverses the byte order of a 32-bit or 64-bit (destination) register. This instruction is provided for converting littleendian values to big-endian format and vice versa. To swap bytes in a word value (16-bit register), use the XCHG instruction. When the BSWAP instruction references a 16-bit register, the result is undefined. In 64-bit mode, the instruction’s default operation size is 32 bits. Using a REX prefix in the form of REX.B permits access to additional registers (R8-R15). Using a REX prefix in the form of REX.W promotes operation to 64 bits. See the summary chart at the beginning of this section for encoding data and limits.
IA-32 Architecture Legacy Compatibility The BSWAP instruction is not supported on IA-32 processors earlier than the Intel486™ processor family. For compatibility with this instruction, software should include functionally equivalent code for execution on Intel processors earlier than the Intel486 processor family.
Operation
TEMP := DEST IF 64-bit mode AND OperandSize = 64 THEN DEST[7:0] := TEMP[63:56]; DEST[15:8] := TEMP[55:48]; DEST[23:16] := TEMP[47:40]; DEST[31:24] := TEMP[39:32]; DEST[39:32] := TEMP[31:24]; DEST[47:40] := TEMP[23:16]; DEST[55:48] := TEMP[15:8]; DEST[63:56] := TEMP[7:0]; ELSE DEST[7:0] := TEMP[31:24]; DEST[15:8] := TEMP[23:16]; DEST[23:16] := TEMP[15:8]; DEST[31:24] := TEMP[7:0]; FI;