fsincos

Sine and Cosine

FSINCOS

Computes sine and cosine of ST(0), pushing both to stack.

Pseudocode Operation

temp ← ST(0); ST(0) ← sin(temp); push(cos(temp)); TOS ← TOS + 1

Encoding

Binary Layout

D9

+0

FB

+1

 

Format Legacy

Opcode D9 FB

Extension x87 FPU

Operands

Related

More in x87 FPU

Reference

View in Intel® 64 and IA-32 Architectures SDM ↗ Intel® SDM

Instruction Forms

Opcode	Instruction	Op/En	64/32-bit Mode	CPUID	Description
D9 FB	FSINCOS		Valid Valid		Compute the sine and cosine of ST(0); replace ST(0) with the approximate sine, and push the approximate cosine onto the register stack.

Description

Computes both the approximate sine and the cosine of the source operand in register ST(0), stores the sine in ST(0), and pushes the cosine onto the top of the FPU register stack. (This instruction is faster than executing the FSIN and FCOS instructions in succession.) The source operand must be given in radians and must be within the range -263 to +263. The following table shows the results obtained when taking the sine and cosine of various classes of numbers, assuming that underflow does not occur. Table 3-38. FSINCOS Results SRC DEST

ST(0)                               ST(1) Cosine                              ST(0) Sine
- ∞                                             *                                                 *
- F                             - 1 to + 1                            - 1 to + 1
- 0                                + 1                                 - 0
+ 0                                + 1                                 + 0
+ F                             - 1 to + 1                            - 1 to + 1
+ ∞                                             *                                                 *
NaN                            NaN                          NaN

Operation

IF ST(0) < 263
THEN
C2 := 0;
TEMP := fcos(ST(0)); // approximation of cosine
ST(0) := fsin(ST(0)); // approximation of sine
TOP := TOP - 1;
ST(0) := TEMP;
ELSE (* Source operand out of range *)
C2 := 1;
FI;

Exceptions

Protected Mode Exceptions

#NM CR0.EM[bit 2] or CR0.TS[bit 3] = 1. #MF If there is a pending x87 FPU exception. #UD If the LOCK prefix is used.

Real-Address Mode Exceptions

Same exceptions as in protected mode.

Virtual-8086 Mode Exceptions

Same exceptions as in protected mode.

Compatibility Mode Exceptions

Same exceptions as in protected mode.

64-Bit Mode Exceptions

Same exceptions as in protected mode. FSINCOS-Sine and Cosine Vol. 2A 3-383