wrfsbase

Write FS Base

WRFSBASE r64

Writes a register to the FS base address.

Details

Writes the value from a 64-bit general-purpose register into the FS segment base address (MSR_FS_BASE). Available only in 64-bit mode and requires the FSGSBASE CPU feature to be enabled. No flags are modified; the instruction executes with serialization semantics to ensure consistency of segment-base state.

Pseudocode Operation

if (FSGSBASE_enabled) {
  MSR_FS_BASE ← dest;
} else {
  raise(UD_EXCEPTION);
}

Example

WRFSBASE rax

Encoding

Binary Layout
F3
+0
0F
+1
AE
+2
ModRM
+3
 
Format Legacy
Opcode F3 0F AE /2
Extension FSGSBASE

Operands

  • dest
    64-bit general-purpose register (e.g. RAX)

Reference (Intel® SDM)

Instruction Forms

Opcode Instruction Op/En 64/32-bit Mode CPUID Description
F3 0F AE /2 WRFSBASE r32 M V/I FSGSBASE Load the FS base address with the 32-bit value in the source register.
F3 REX.W 0F AE /2 WRFSBASE r64 M V/I FSGSBASE Load the FS base address with the 64-bit value in the source register.
F3 0F AE /3 WRGSBASE r32 M V/I FSGSBASE Load the GS base address with the 32-bit value in the source register.
F3 REX.W 0F AE /3 WRGSBASE r64 M V/I FSGSBASE Load the GS base address with the 64-bit value in the source register.

Description

Loads the FS or GS segment base address with the general-purpose register indicated by the modR/M:r/m field. The source operand may be either a 32-bit or a 64-bit general-purpose register. The REX.W prefix indicates the operand size is 64 bits. If no REX.W prefix is used, the operand size is 32 bits; the upper 32 bits of the source register are ignored and upper 32 bits of the base address (for FS or GS) are cleared. This instruction is supported only in 64-bit mode.

Operation

FS/GS segment base address := SRC;

Flags Affected

None. C/C++ Compiler Intrinsic Equivalent WRFSBASE void _writefsbase_u32( unsigned int ); WRFSBASE _writefsbase_u64( unsigned __int64 ); WRGSBASE void _writegsbase_u32( unsigned int ); WRGSBASE _writegsbase_u64( unsigned __int64 );

Exceptions

Protected Mode Exceptions

#UD The WRFSBASE and WRGSBASE instructions are not recognized in protected mode.

Real-Address Mode Exceptions

#UD The WRFSBASE and WRGSBASE instructions are not recognized in real-address mode.

Virtual-8086 Mode Exceptions

#UD The WRFSBASE and WRGSBASE instructions are not recognized in virtual-8086 mode.

Compatibility Mode Exceptions

#UD The WRFSBASE and WRGSBASE instructions are not recognized in compatibility mode. WRFSBASE/WRGSBASE—Write FS/GS Segment Base Vol. 2D 6-6

64-Bit Mode Exceptions

#UD If the LOCK prefix is used. If CR4.FSGSBASE[bit 16] = 0. If CPUID.07H.00H:EBX.FSGSBASE[0] = 0 #GP(0) If the source register contains a non-canonical address. WRFSBASE/WRGSBASE—Write FS/GS Segment Base Vol. 2D 6-7