umonitor

User Level Monitor

UMONITOR r64

Sets up a monitor address for User Wait instructions.

Details

Sets up a monitor address for User Wait instructions (UMWAIT, TPAUSE) by storing the linear address from the source register in the hardware monitor. The monitor watches for writes to the address range to arm the wait condition. No flags are modified; requires WAITPKG extension and 64-bit mode.

Pseudocode Operation

// Load monitor address from r64
MonitorAddress ← src;
MonitorState ← ARMED;
// Monitor watches for writes to this address
// No flags modified

Example

UMONITOR rax

Encoding

Binary Layout
F3
+0
0F
+1
AE
+2
ModRM
+3
 
Format Legacy
Opcode F3 0F AE /6
Extension WAITPKG

Operands

  • dest
    64-bit general-purpose register (e.g. RAX)

Reference (Intel® SDM)

Instruction Forms

Opcode Instruction Op/En 64/32-bit Mode CPUID Description
F3 0F AE /6 UMONITOR r16/r32/r64 A V/V WAITPKG A Sets up a linear address range to be monitored by hardware and activates the monitor. The address range should be a write-back memory caching type. The address is contained in r16/r32/r64. Instruction Operand Encoding1 Op/En Tuple Operand 1 Operand 2 Operand 3 Operand 4 N/A ModRM:r/m (r) N/A N/A N/A

Description

The UMONITOR instruction arms address monitoring hardware using an address specified in the source register (the address range that the monitoring hardware checks for store operations can be determined by using the CPUID.05H). A store to an address within the specified address range triggers the monitoring hardware. The state of monitor hardware is used by UMWAIT. The content of the source register is an effective address. By default, the DS segment is used to create a linear address that is monitored. Segment overrides can be used. The address range must use memory of the write-back type. Only write-back memory is guaranteed to correctly trigger the monitoring hardware. Additional information on determining what address range to use in order to prevent false wake-ups is described in Chapter 11, “MultipleProcessor Management‚” of the Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 3A. The UMONITOR instruction is ordered as a load operation with respect to other memory transactions. The instruction is subject to the permission checking and faults associated with a byte load. Like a load, UMONITOR sets the A-bit but not the D-bit in page tables. UMONITOR and UMWAIT are available when CPUID.07H.00H:ECX.WAITPKG[5] is enumerated as 1. UMONITOR and UMWAIT may be executed at any privilege level. Except for the width of the source register, the instruction’s operation is the same in non-64-bit modes and in 64-bit mode. UMONITOR does not interoperate with the legacy MWAIT instruction. If UMONITOR was executed prior to executing MWAIT and following the most recent execution of the legacy MONITOR instruction, MWAIT will not enter an optimized state. Execution will continue to the instruction following MWAIT. The UMONITOR instruction causes a transactional abort when used inside a transactional region. The width of the source register (16b, 32b or 64b) is determined by the effective addressing width, which is affected in the standard way by the machine mode settings and 67 prefix.

Operation

UMONITOR sets up an address range for the monitor hardware using the content of source register as an effective
address and puts the monitor hardware in armed state. A store to the specified address range will trigger the
monitor hardware.

Intel C/C++ Compiler Intrinsic Equivalent

UMONITOR void _umonitor(void *address);

Exceptions

Protected Mode Exceptions

#GP(0) If the specified segment is not SS and the source register is outside the specified segment limit. If the specified segment register contains a NULL segment selector. #SS(0) If the specified segment is SS and the source register is outside the SS segment limit. #PF(fault-code) For a page fault. #UD If CPUID.07H.00H:ECX.WAITPKG[5]=0. If the LOCK prefix is used. Real Address Mode Exceptions #GP If the specified segment is not SS and the source register is outside of the effective address space from 0 to FFFFH. #SS If the specified segment is SS and the source register is outside of the effective address space from 0 to FFFFH. #UD If CPUID.07H.00H:ECX.WAITPKG[5] =0. If the LOCK prefix is used. Virtual 8086 Mode Exceptions Same exceptions as in real address mode; additionally: #PF(fault-code) For a page fault.

Compatibility Mode Exceptions

Same exceptions as in protected mode.

64-Bit Mode Exceptions

#GP(0) If the specified segment is not SS and the linear address is in non-canonical form. #SS(0) If the specified segment is SS and the source register is in non-canonical form. #PF(fault-code) For a page fault. #UD If CPUID.07H.00H:ECX.WAITPKG[5] =0. If the LOCK prefix is used. UMONITOR—User Level Set Up Monitor Address Vol. 2B 4-740

Numeric Exceptions

None. 1. The Mod field of the ModR/M byte must have value 11B. UMONITOR—User Level Set Up Monitor Address Vol. 2B 4-739