addpd

Add Packed Double-Precision

ADDPD xmm, xmm/m128

Adds two 64-bit doubles.

Details

The Add Packed Double-Precision instruction adds two 64-bit doubles.

Pseudocode Operation

DEST <- DEST + SRC
// Flags affected: OF, SF, ZF, AF, CF, PF

Example

ADDPD xmm0, xmm1

Encoding

Binary Layout
66
+0
0F
+1
58
+2
 
Format SSE2
Opcode 66 0F 58
Extension SSE2

Operands

  • dest
    128-bit SSE/AVX register (XMM)
  • src
    128-bit XMM register or 128-bit memory