aad

ASCII Adjust Before Division

AAD imm8

Adjusts AX before division for unpacked BCD.

Pseudocode Operation

AL ← (AH * imm8) + AL;
AH ← 0;
ZF ← (AL == 0);
SF ← (AL[7] == 1);
PF ← parity(AL);

Example

AAD 3

Encoding

Binary Layout

Format Legacy

Opcode D5

Extension Base (Legacy)

Operands

dest
8-bit signed immediate

Reference

View in Intel® 64 and IA-32 Architectures SDM ↗ Intel® SDM

Instruction Forms

Opcode	Instruction	Op/En	64/32-bit Mode	CPUID	Description
D5 0A	AAD	ZO	Invalid Valid		ASCII adjust AX before division.
D5 ib	AAD imm8	ZO	Invalid Valid		Adjust AX before division to number base imm8.

Description

Adjusts two unpacked BCD digits (the least-significant digit in the AL register and the most-significant digit in the AH register) so that a division operation performed on the result will yield a correct unpacked BCD value. The AAD instruction is only useful when it precedes a DIV instruction that divides (binary division) the adjusted value in the AX register by an unpacked BCD value. The AAD instruction sets the value in the AL register to (AL + (10 * AH)), and then clears the AH register to 00H. The value in the AX register is then equal to the binary equivalent of the original unpacked two-digit (base 10) number in registers AH and AL. The generalized version of this instruction allows adjustment of two unpacked digits of any number base (see the “Operation” section below), by setting the imm8 byte to the selected number base (for example, 08H for octal, 0AH for decimal, or 0CH for base 12 numbers). The AAD mnemonic is interpreted by all assemblers to mean adjust ASCII (base 10) values. To adjust values in another number base, the instruction must be hand coded in machine code (D5 imm8). This instruction executes as described in compatibility mode and legacy mode. It is not valid in 64-bit mode.

Operation

IF 64-Bit Mode
THEN
#UD;
ELSE
tempAL := AL;
tempAH := AH;
AL := (tempAL + (tempAH ∗ imm8)) AND FFH;
(* imm8 is set to 0AH for the AAD mnemonic.*)
AH := 0;
FI;
The immediate value (imm8) is taken from the second byte of the instruction.

Flags Affected

The SF, ZF, and PF flags are set according to the resulting binary value in the AL register; the OF, AF, and CF flags are undefined.

Exceptions

Protected Mode Exceptions

#UD If the LOCK prefix is used.

Real-Address Mode Exceptions

Same exceptions as protected mode.

Virtual-8086 Mode Exceptions

Same exceptions as protected mode. AAD-ASCII Adjust AX Before Division Vol. 2A 3-3

Compatibility Mode Exceptions