bndmk
Make Bounds
Creates bounds data for MPX.
Pseudocode Operation
// Compute bounds from memory operand m
// The bounds are derived from the addressing operation itself
lower_bound ← compute_lower_bound(m);
upper_bound ← compute_upper_bound(m);
// Store in 128-bit bounds register (2×64-bit values)
bndN.lower ← lower_bound;
bndN.upper ← upper_bound;Example
Encoding
Operands
-
dest
MPX bounds register (bnd0-bnd3) -
src
Memory operand
Related
More in MPX
Reference
Instruction Forms
| Opcode | Instruction | Op/En | 64/32-bit Mode | CPUID | Description |
|---|---|---|---|---|---|
| F3 0F 1B /r | BNDMK bnd, m32 | RM | N.E./V | MPX | Make lower and upper bounds from m32 and store them in bnd. |
| F3 0F 1B /r | BNDMK bnd, m64 | RM | V/N.E. | MPX | Make lower and upper bounds from m64 and store them in bnd. |
Description
Makes bounds from the second operand and stores the lower and upper bounds in the bound register bnd. The second operand must be a memory operand. The content of the base register from the memory operand is stored in the lower bound bnd.LB. The 1's complement of the effective address of m32/m64 is stored in the upper bound b.UB. Computation of m32/m64 has identical behavior to LEA. This instruction does not cause any memory access, and does not read or write any flags. If the instruction did not specify base register, the lower bound will be zero. The reg-reg form of this instruction retains legacy behavior (NOP). The instruction causes an invalid-opcode exception (#UD) if executed in 64-bit mode with RIP-relative addressing.
Operation
BND.LB := SRCMEM.base; IF 64-bit mode Then BND.UB := NOT(LEA.64_bits(SRCMEM)); ELSE BND.UB := Zero_Extend.64_bits(NOT(LEA.32_bits(SRCMEM))); FI;
Intel C/C++ Compiler Intrinsic Equivalent
BNDMKvoid * _bnd_set_ptr_bounds(const void * q, size_t size);