vfmadd213ph

Fused Multiply-Add (213) Packed FP16

VFMADD213PH zmm1 {k1}, zmm2, zmm3/m512

Computes (Src1 * Dest) + Src2 in half-precision.

Details

The Fused Multiply-Add (213) Packed FP16 instruction computes (Src1 * Dest) + Src2 in half-precision.

Pseudocode Operation

// Computes (Src1 * Dest) + Src2 in half-precision

Example

VFMADD213PH zmm1, zmm2, zmm3/m512

Encoding

Binary Layout
EVEX
+0
A8
+4
 
Format EVEX
Opcode A8
Extension AVX-512-FP16

Operands

  • dest
    512-bit ZMM AVX-512 register
  • src1
    512-bit ZMM AVX-512 register
  • src2
    512-bit ZMM AVX-512 register or Memory operand