Vector Crypto Instructions
12 PowerISA instructions in this extension - click any row for encoding, pseudocode, and full documentation.
| Mnemonic | Syntax | Format | Summary |
|---|---|---|---|
| vbcdadd | vbcdadd vD, vA, vB, PS | VX-form | Adds two BCD (Binary Coded Decimal) vectors. |
| vcipher | vcipher vD, vA, vB | VX-form | Performs one round of AES encryption (SubBytes, ShiftRows, MixColumns, AddRoundKey). |
| vcipherlast | vcipherlast vD, vA, vB | VX-form | Performs the final round of AES encryption (SubBytes, ShiftRows, AddRoundKey). No MixColumns. |
| vncipher | vncipher vD, vA, vB | VX-form | Performs one round of an AES inverse cipher operation on the intermediate state array. |
| vncipherlast | vncipherlast vD, vA, vB | VX-form | Performs the final round of AES decryption. |
| vpermxor | vpermxor vD, vA, vB, vC | VA-form | Permutes bytes from vA and vB, then XORs with vC. Used for finite field arithmetic. |
| vpmsumb | vpmsumb vD, vA, vB | VX-form | Performs GF(2) polynomial arithmetic (Carryless Multiply) on bytes. |
| vpmsumd | vpmsumd vD, vA, vB | VX-form | Performs GF(2) polynomial arithmetic on doublewords. |
| vpmsumw | vpmsumw vD, vA, vB | VX-form | Performs a polynomial multiply-sum operation on word elements of two vector registers and stores the result in another vector register. |
| vsbox | vsbox vD, vA | VX-form | Performs the SubBytes operation (S-Box lookup) on a vector. |
| vshasigmad | vshasigmad vD, vA, ST, SIX | VX-form | Performs the SHA-512 σ0, σ1, Σ0, or Σ1 functions on doubleword elements of vector registers. |
| vshasigmaw | vshasigmaw vD, vA, ST, SIX | VX-form | Performs the Sigma0/Sigma1/sigma0/sigma1 functions for SHA-256. |