shufps

Shuffle Packed Single-Precision

SHUFPS xmm, xmm/m128, imm8

Shuffles 32-bit floats based on immediate mask.

Details

The Shuffle Packed Single-Precision instruction shuffles 32-bit floats based on immediate mask.

Pseudocode Operation

// Shuffles 32-bit floats based on immediate mask

Example

SHUFPS xmm0, xmm1, 3

Encoding

Binary Layout
0F
+0
C6
+1
 
Format SSE
Opcode 0F C6
Extension SSE

Operands

  • dest
    128-bit SSE/AVX register (XMM)
  • src1
    128-bit XMM register or 128-bit memory
  • src2
    8-bit signed immediate