VWSLL.VV

Vector Widening Shift Left Logical

VWSLL.VV vd, vs2, vs1, vm

Shifts N-bit elements left to produce 2*N-bit results.

Details

Performs a widening operation, producing results twice as wide as the source elements. Results are written to vd using 2× the element grouping (EEW). The number of elements and masking are governed by vl and vm.

Pseudocode Operation

foreach(i < vl): vd[i] = zext(vs2[i]) << vs1[i];

Example

VWSLL.VV v1, v4, v2, v0.t

Encoding

Binary Layout
110101
31:26
vm
25
vs2
24:20
vs1
19:15
000
14:12
vd
11:7
1010111
6:0
 
Format OPIVV
Opcode 0x57
Extension Zvbb

Operands

  • vd
    Dest (Wide)
  • vs2
    Src (Narrow)
  • vs1
    Source vector register 1