VOR.VI
Vector OR Immediate
VOR.VI vd, vs2, imm, vm
Bitwise OR with immediate.
Details
Performs element-wise bitwise OR on a vector and an immediate, writing results to vd. The number of elements processed is determined by vl, and masking is controlled by vm.
Pseudocode Operation
vd = vs2 | imm;
Example
VOR.VI v1, v4, 16, v0.t
Encoding
Binary Layout
001010
31:26
vm
25
vs2
24:20
imm
011
19:17
vd
16:12
1010111
11:5
Operands
-
vd
Destination vector register -
vs2
Source vector register 2 -
imm
Imm