FSD
Float Store Double
FSD rs2, offset(rs1)
Stores a 64-bit double-precision floating-point value to memory.
Encoding
Binary Layout
imm12hi
31:25
rs2
24:20
rs1
19:15
011
14:12
imm12lo
11:7
0100111
6:0
Operands
-
rs2
Src (Float Reg) -
rs1
Base Address -
offset
Offset
Example
FSD f1, 16(x2)
// Stores f1 to stack+16.
Related
More in D
Reference
View in RISC-V Unprivileged ISA Specification ↗
RISC-V ISA Manual
Description
Stores a floating-point register to memory at address rs1+sext(offset).
Operation
M[R[rs1] + sext(offset)][63:0] = F[rs2];