FMIN.D
Float Minimum (Double)
FMIN.D rd, rs1, rs2
Writes the smaller of two double-precision floating-point values to rd.
Encoding
Binary Layout
0010101
31:25
rs2
24:20
rs1
19:15
000
14:12
rd
11:7
1010011
6:0
Operands
-
rd
Destination register (integer) -
rs1
Source register 1 (integer) -
rs2
Source register 2 (integer)
Example
FMIN.D t0, a0, a1
Related
More in D
Reference
View in RISC-V Unprivileged ISA Specification ↗
RISC-V ISA Manual
Description
Returns the double-precision (64-bit) floating-point minimum of rs1 and rs2, following IEEE 754-2019 minNum/maxNum semantics. Quiet NaN inputs return the non-NaN operand; signalling NaN inputs raise invalid-operation.
Operation
F[rd] = min(F[rs1], F[rs2]);