FMV.X.W

Move Float to Integer

FMV.X.W rd, rs1

Moves the bit pattern of a floating-point register to an integer register.

Encoding

Binary Layout

111000000000

31:20

rs1

19:15

000

14:12

rd

11:7

1010011

6:0

 

Format I-Type (Float)

Opcode 0xE0000053

Extension F

Operands

• rd
  Dest (Integer)
• rs1
  Source (Float)

Example

FMV.X.W x10, f1

// Copy bits from f1 to x10.

Related

More in F

Reference

View in RISC-V Unprivileged ISA Specification ↗ RISC-V ISA Manual

Description

Moves bits from a floating-point register to an integer register (or vice versa) without conversion. The bit pattern is preserved exactly.

Operation

R[rd] = sext(F[rs1]);