FSGNJX.H

Float Sign Injection XOR (Half)

FSGNJX.H rd, rs1, rs2

Injects the XOR of signs of rs1 and rs2 (16-bit).

Encoding

Binary Layout

0010010

31:25

rs2

24:20

rs1

19:15

010

14:12

rd

11:7

1010011

6:0

 

Format R-Type

Opcode 0x24002053

Extension Zfh

Operands

• rd
  Destination register (integer)
• rs1
  Source register 1 (integer)
• rs2
  Sign Src

Example

FSGNJX.H t0, a0, a1

Related

More in Zfh

Reference

View in RISC-V Unprivileged ISA Specification ↗ RISC-V ISA Manual

Description

Produces a result with the magnitude of rs1 and the sign bit taken from the source rs2. Used to implement floating-point absolute value, negate, and copy-sign.

Operation

F[rd] = {F[rs1][15] ^ F[rs2][15], F[rs1][14:0]};