FSUB.D
Float Subtract Double
FSUB.D rd, rs1, rs2
Performs double-precision floating-point subtraction.
Details
Performs double-precision (64-bit) floating-point subtraction. The operation subtracts the source operand(s), rounds the result according to the dynamic rounding mode in fcsr, and writes to fd. NaN and infinity propagation follow IEEE 754-2008.
Pseudocode Operation
F[rd] = F[rs1] - F[rs2];
Example
FSUB.D f0, f1, f2
Encoding
Binary Layout
0000101
31:25
rs2
24:20
rs1
19:15
000
14:12
rd
11:7
1010011
6:0
Operands
-
rd
Destination register (integer) -
rs1
Source register 1 (integer) -
rs2
Source register 2 (integer)