FMUL.S
Float Multiply (Single)
FMUL.S rd, rs1, rs2
Performs single-precision floating-point multiplication.
Details
Performs single-precision (32-bit) floating-point multiplication. The operation multiplies the source operand(s), rounds the result according to the dynamic rounding mode in fcsr, and writes to fd. NaN and infinity propagation follow IEEE 754-2008.
Pseudocode Operation
F[rd] = F[rs1] * F[rs2];
Example
FMUL.S t0, a0, a1
Encoding
Binary Layout
0001000
31:25
rs2
24:20
rs1
19:15
rm
rd
14:10
1010011
9:3
Operands
-
rd
Destination register (integer) -
rs1
Source register 1 (integer) -
rs2
Source register 2 (integer)