FNMSUB.D
Float Negated Fused Multiply-Subtract (Double)
FNMSUB.D rd, rs1, rs2, rs3
Computes -(rs1 * rs2) + rs3 with a single rounding (Double).
Details
Performs double-precision (64-bit) floating-point fused negate-multiply-subtract. The operation computes fused negate-multiply-subtract on the source operand(s), rounds the result according to the dynamic rounding mode in fcsr, and writes to fd. NaN and infinity propagation follow IEEE 754-2008.
Pseudocode Operation
F[rd] = -((F[rs1] * F[rs2]) - F[rs3]);
Example
FNMSUB.D t0, a0, a1, a2
Encoding
Binary Layout
rs3
31:27
01
26:25
rs2
24:20
rs1
19:15
rm
rd
14:10
1001011
9:3
Operands
-
rd
Destination register (integer) -
rs1
Source register 1 (integer) -
rs2
Source register 2 (integer) -
rs3
Src 3