FENCE
Fence
FENCE pred, succ
Orders device I/O and memory accesses.
Details
FENCE orders device I/O and memory accesses as viewed by other RISC-V harts and external devices. The predecessor and successor sets of operations are specified by the pred and succ fields. FENCE with all fields zero is a full memory fence.
Pseudocode Operation
MemoryBarrier(pred, succ);
Example
FENCE rw, rw
Encoding
Binary Layout
fm
31:28
pred
27:24
succ
23:20
rs1
19:15
000
14:12
rd
11:7
0001111
6:0
Operands
-
pred
Predecessor Set -
succ
Successor Set