VMANDN.MM

Vector Mask AND NOT

VMANDN.MM vd, vs2, vs1

Computes vd = vs1 & ~vs2 (mask operation).

Encoding

Binary Layout

0110001

31:25

vs2

24:20

vs1

19:15

010

14:12

vd

11:7

1010111

6:0

 

Format OPMVV

Opcode 0x62002057

Extension V

Operands

• vd
  Dest Mask
• vs2
  Source vector register 2
• vs1
  Source vector register 1

Example

VMANDN.MM v1, v4, v2

Related

More in V

Reference

View in RISC-V Unprivileged ISA Specification ↗ RISC-V ISA Manual

Description

Performs element-wise mask AND on the mask registers vm1 and vm2, writing to vd.

Operation

vd = vs1 & ~vs2;