VLE64.V
Vector Load Element (64-bit)
VLE64.V vd, (rs1), vm
Loads a vector of 64-bit elements from memory.
Details
Performs a vector unit-stride load of 64-bit elements from/to memory. The number of elements transferred is determined by vl. Masking is controlled by vm.
Pseudocode Operation
foreach(i < vl): vd[i] = M[rs1 + i*8];
Example
VLE64.V v1, a0, v0.t
Encoding
Binary Layout
000000
31:26
vm
25
00000
24:20
rs1
19:15
111
14:12
vd
11:7
0000111
6:0
Operands
-
vd
Destination vector register -
rs1
Base Address