SC.W

Store Conditional Word

SC.W rd, rs2, (rs1)

Conditionally stores a word to memory if the reservation (from LR) is still valid.

Encoding

Binary Layout

00011

31:27

aq

26

rl

25

rs2

24:20

rs1

19:15

010

14:12

rd

11:7

0101111

6:0

 

Format R-Type (Atomic)

Opcode 0x1800202F

Extension A

Operands

• rd
  Dest (Success/Fail)
• rs2
  Source Value
• rs1
  Address

Example

SC.W x10, x11, (x12)

// Try to store x11 to x12. x10=0 on success.

Related

Across architectures

Atomic Compare and Swap : how x86, ARM, RISC-V, and PowerISA each do this.

More in A

Reference

View in RISC-V Unprivileged ISA Specification ↗ RISC-V ISA Manual

Description

SC.W conditionally stores the word in rs2 to the address in rs1, only if the reservation set by LR.W is still valid. It writes 0 to rd on success and a non-zero value on failure.

Operation

if (ReservationValid) { M[R[rs1]] = R[rs2]; R[rd] = 0; } else { R[rd] = 1; }