AMOAND.W
Atomic AND Word
AMOAND.W rd, rs2, (rs1)
Atomically performs bitwise AND on a word in memory.
Encoding
Binary Layout
01100
31:27
aq
26
rl
25
rs2
24:20
rs1
19:15
010
14:12
rd
11:7
0101111
6:0
Operands
-
rd
Dest (Old Value) -
rs2
Operand -
rs1
Address
Example
AMOAND.W x5, x6, (x7)
// Atomically ANDs memory at x7 with x6.
Related
More in A
Reference
View in RISC-V Unprivileged ISA Specification ↗
RISC-V ISA Manual
Description
AMOAND.W atomically loads a word from the address in rs1 into rd, ANDs it with rs2, and stores the result back.
Operation
temp = M[R[rs1]]; M[R[rs1]] = temp & R[rs2]; R[rd] = temp;