ZEXT.H
Zero Extend Halfword
ZEXT.H rd, rs1
Zero-extends the lowest halfword (16 bits) to XLEN bits.
Encoding
Binary Layout
000010000000
31:20
rs1
19:15
100
14:12
rd
11:7
0111011
6:0
Operands
-
rd
Destination register (integer) -
rs1
Source
Example
ZEXT.H x10, x11
// Zero extend 16-bit value.
Related
More in Zbb
Reference
View in RISC-V Unprivileged ISA Specification ↗
RISC-V ISA Manual
Description
ZEXT.H zero-extends the least-significant halfword of rs1 to XLEN bits, writing to rd.
Operation
R[rd] = zext(R[rs1][15:0]);