PAUSE

Hints that the current hart is in a spin-wait loop, allowing the hardware to reduce power consumption or yield resources.

Encoding

Binary Layout

00000001000000000000000000001111

31:0

Format I-Type (Hint)

Opcode 0x0100000F

Extension Zihintpause

Operands

Across architectures

Spin-Wait Hint : how x86, ARM, RISC-V, and PowerISA each do this.

Reference

View in RISC-V Unprivileged ISA Specification ↗ RISC-V ISA Manual

Description

PAUSE is a hint instruction that may stall the pipeline for an implementation-defined short period. It is intended to reduce energy consumption in spin-wait loops.

Operation

// Implementation-defined delay/yield