SEXT.H

Sign Extend Halfword

SEXT.H rd, rs1

Sign-extends the lowest halfword (16 bits) to XLEN bits.

Encoding

Binary Layout

0110000

31:25

00101

24:20

rs1

19:15

001

14:12

rd

11:7

0010011

6:0

 

Format I-Type

Opcode 0x60501013

Extension Zbb

Operands

• rd
  Destination register (integer)
• rs1
  Source

Example

SEXT.H x10, x11

// Sign extend 16-bit value.

Related

More in Zbb

Reference

View in RISC-V Unprivileged ISA Specification ↗ RISC-V ISA Manual

Description

SEXT.H sign-extends the least-significant halfword of rs1 to XLEN bits.

Operation

R[rd] = sext(R[rs1][15:0]);