JR

Jump Register

JR rs

Unconditionally jumps to an address held in a register.

Encoding

Binary Layout

000000000000

31:20

rs1

19:15

000000001100111

14:0

 

Format I-Type

Opcode 0x00000067

Extension Pseudo

Operands

• rs
  Address Register

Example

JR x10

// Jump to address stored in x10.

Related

More in Pseudo

Reference

View in RISC-V Unprivileged ISA Specification ↗ RISC-V ISA Manual

Description

JR performs an unconditional indirect jump to the address in rs1. It is a pseudoinstruction for JALR x0, 0(rs1).

Operation

PC = R[rs];