CSRC

Control Status Register Clear

CSRC csr, rs

Clears bits in a CSR (bitwise AND NOT).

Details

CSRC is an assembler pseudoinstruction for CSRRC x0, csr, rs1. It clears bits in the CSR based on rs1 without reading.

Pseudocode Operation

CSRs[csr] &= ~R[rs];

Example

CSRC sstatus, x5

Encoding

Binary Layout
imm[11:0]
31:20
rs1
19:15
011
14:12
00000
11:7
1110011
6:0
 
Format I-Type
Opcode 0x73
Extension Pseudo

Operands

  • csr
    CSR Address
  • rs
    Bit Mask