CSRC
Control Status Register Clear
CSRC csr, rs
Clears bits in a CSR (bitwise AND NOT).
Encoding
Binary Layout
csr
31:20
rs1
19:15
011000001110011
14:0
Operands
-
csr
CSR Address -
rs
Bit Mask
Example
CSRC sstatus, x5
// Clear bits in sstatus.
Related
More in Pseudo
Reference
View in RISC-V Unprivileged ISA Specification ↗
RISC-V ISA Manual
Description
CSRC is an assembler pseudoinstruction for CSRRC x0, csr, rs1. It clears bits in the CSR based on rs1 without reading.
Operation
CSRs[csr] &= ~R[rs];