VSSE32.V
Vector Store Strided Element (32-bit)
VSSE32.V vs3, (rs1), rs2, vm
Stores elements to memory with a fixed stride.
Details
Performs a vector strided store of 32-bit elements from/to memory. The number of elements transferred is determined by vl. Masking is controlled by vm.
Pseudocode Operation
foreach(i < vl): M[rs1 + i * rs2] = vs3[i];
Example
VSSE32.V v6, a0, a1, v0.t
Encoding
Binary Layout
000110
31:26
mop
vm
25
rs1
24:20
110
19:17
vs3
16:12
0100111
11:5
Operands
-
vs3
Vector Source -
rs1
Base Address -
rs2
Stride