VSSE32.V
Vector Store Strided Element (32-bit)
VSSE32.V vs3, (rs1), rs2, vm
Stores elements to memory with a fixed stride.
Details
Performs a vector strided store of 32-bit elements from/to memory. The number of elements transferred is determined by vl. Masking is controlled by vm.
Pseudocode Operation
foreach(i < vl): M[rs1 + i * rs2] = vs3[i];
Example
VSSE32.V v6, a0, a1, v0.t
Encoding
Binary Layout
000010
31:26
vm
25
rs2
24:20
rs1
19:15
110
14:12
vs3
11:7
0100111
6:0
Operands
-
vs3
Vector Source -
rs1
Base Address -
rs2
Stride