C.ADDIW

Compressed Add Immediate Word

C.ADDIW rd, imm

Adds a signed immediate to a register (32-bit result sign-extended, RV64).

Encoding

Binary Layout

?

31:16

001

15:13

c_imm6hi

12

rd_rs1_n0

11:7

c_imm6lo

6:2

01

1:0

 

Format CI

Opcode 0x00002001

Extension C

Operands

• rd
  Dest/Src
• imm
  Signed immediate value

Example

C.ADDIW t0, 16

Related

More in C

Reference

View in RISC-V Unprivileged ISA Specification ↗ RISC-V ISA Manual

Description

Adds a 6-bit sign-extended immediate to rd (RV64/RV128 only), truncates to 32 bits, sign-extends to 64 bits.

Operation

R[rd] = sext((R[rd] + sext(imm))[31:0]);